Showing results 1 to 20 of 121
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| Issue Date | Title | Author(s) |
| 2015 | A 0.8V CMOS bandgap voltage reference design | Zhang, Bolun; Cui, Xiaole; Zhang, Yifan; Yang, Chun; Xiao, Ying; Lin, Xinnan |
| 2013 | A 1.8ppm/��C Low Temperature Coefficient Curvature Compensated Bandgap for the Low Voltage Application | Yang, Chun; Cui, Xiaole; Wang, Bo; Lee, Chung Len |
| 2014 | A 2.34-3.29GHz CMOS LC VCO with low phase noise and low power | Wang, Hao; Cui, Xiaole; Lee, Chung Len; Cheng, Zuolin |
| 2015 | A 250MHz Programmable Gain Amplifier for low power UWB receivers | Li, Binbin; Cui, Xiaole; Wang, Hao; Xiao, Ying; Lin, Xinnan |
| 25-Oct-2021 | 28 nm asynchronous area-saving AES processor with high Common and Machine learning side-channel attack resistance | Zou, Qingyun; Cui, Xiaoxin; Dai, Zhenhui; Kuang, Yisong; Zhong, Yi; Zou, Chenglong; Cui, Xiaole |
| 2013 | AHardware implementation of des with combined countermeasure against DPA | Cui, Xiaoxin; Li, Rui; Wei, Wei; Gu, Juan; Cui, Xiaole |
| 2016 | An Algorithm of Training Sample Selection for Integrated Circuit Device Modeling Based on Artificial Neural Networks | Zhang, Zhiyuan; Cui, Xiaole; Lin, Xinnan; Zhang, Lining |
| 2005 | Analysis on a Game Model for Software Test Process Based on ROI | Cui, Xiaole; Wang, Xinan; Zhang, Xing; Cui, Xiaoxin |
| 2021 | The ANN Based Modeling Attack and Security Enhancement of the Double-layer PUF | Cui, Xiaole; Chen, Yongliang; Ye, Wenqiang; Cui, Xiaoxin |
| 2006 | Application of high-level design of hardware with timed CSP | Cui, Xiaoxin; Yu, Dunshan; Cui, Xiaole; Sheng, Shimin |
| 2020 | Calibration of the Pressure Sensor Device with the Extreme Learning Machine | Chang, Yucheng; Cui, Xiaole; Hou, Guanting; Jin, Yufeng |
| Dec-2021 | Channel doping effects in negative capacitance field-effect transistors | Liu, Baoliang; Huang, Xiaoqing; Jiao, Yanxin; Feng, Ning; Chen, Xuhui; Rong, Zhao; Lin, Xinnan; Zhang, Lining; Cui, Xiaole |
| 2013 | A combined countermeasure against DPA and implementation on des | Li, Rui; Cui, Xiaoxin; Wei, Wei; Wu, Di; Liao, Kai; Liao, Nan; Ma, Kaisheng; Yu, Dunshan; Cui, Xiaole |
| 2012 | A Compact Implementation of Masked AES S-Box | Wei, Wei; Cui, Xiaoxin; Wu, Di; Li, Rui; Ma, Kaisheng; Yu, Dunshan; Cui, Xiaole |
| Jan-2020 | A Compact Phase Change Memory Model With Dynamic State Variables | Hu, Huifang; Liu, Dayong; Chen, Xuhui; Dong, Deqi; Cui, Xiaole; Liu, Ming; Lin, Xinnan; Zhang, Lining; Chan, Mansun |
| 2012 | Contact size scaling of a W-contact phase-change memory cell based on numerical simulation | Wei, Yiqun; Lin, Xinnan; Jia, Yuchao; Cui, Xiaole; Zhang, Xing; Song, Zhitang |
| 2015 | Context-Adaptive Fast Motion Estimation of HEVC | Li, Xufeng; Wang, Ronggang; Cui, Xiaole; Wang, Wenmin |
| 2015 | A Countermeasure for Power Analysis to Scalar Multiplication of ECC Hardware | Liu, Lifei; Cui, Xiaole; Ran, Yalin; Cui, Xiaoxin |
| 2015 | A countermeasure for power analysis to scalar multiplication of ECC hardware | Liu, Lifei; Cui, Xiaole; Ran, Yalin; Cui, Xiaoxin |
| 2014 | Critical parasitic capacitance in nano-scale phase-change memory (PCM) cell | Zhang, Xinxing; Wei, Yiqun; Lin, Xinnan; Cui, Xiaole; Peng, Cheng; Song, Zhitang; Chan, Mansun |
