Showing results 1 to 20 of 22
next >
| Issue Date | Title | Author(s) |
| Jan-2021 | A 12-Bit 0.5-2.4-GHz 0.65 degrees-Peak-INL Parasitic-Insensitive Digital-to-Phase Converter | Jiang, Haoyun; Shen, Zhengkun; Wang, Dong; Hao, Xiucheng; Liu, Zexue; Tan, Yi; Liu, Junhua; Liao, Huailin |
| 2018 | A 12-bit 2.5 GHz 0.37ps-Peak-INL Digital-to-Time Converter with Parasitic-Insensitive Charge-Based Phase Interpolator | Jiang, Haoyun; Liu, Zexue; Hao, Xiucheng; Zhang, Zherui; Shen, Zhengkun; Li, Heyi; Liu, Junhua; Liao, Huailin |
| 2018 | 2.4-GHz Pre-bias RF Energy Harvesting Rectifier with -35-dBm Sensitivity for Self-powered Chips | Gong, Enbin; He, Mingxiao; Zhang, Hao; Zheng, Yongan; Zhang, Luyao; Hao, Xiucheng; Ye, Le; Liao, Huailin; Huang, Ru |
| 2018 | A 2.4-mW interference-resilient receiver front end with series N-path filter-based balun for body channel communication | Liu, Zexue; Zheng, Yongan; Wang, Jiayi; Hao, Xiucheng; Jiang, Haoyun; Yang, Fan; Liu, Junhua; Liao, Huailin |
| 2019 | A 2.9 GHz Variable Inductor-Based DCO With 1.3 kHz Frequency Resolution for FMCW Radar Applications | Li, Heyi; Hao, Xiucheng; Liu, Zexue; Zhang, Zherui; Shen, Zhengkun; Liu, Junhua; Liao, Huailin |
| 2019 | A 28 GHz 8-bit Calibration-Free LO-Path Phase Shifter Using Transformer-Based Vector Summing Topology in 40 nm CMOS | Shen, Zhengkun; Liu, Zexue; Jiang, Haoyun; Tan, Yi; Li, Heyi; Hao, Xiucheng; Liu, Junhua; Liao, Huailin |
| 2018 | 2A-GHz Pre-bias RF Energy Harvesting Rectifier with-35-d13tri Sensitivity for Self-powered Chips | Gong, Enbin; He, Mingxiao; Zhang, Hao; Zheng, Yongan; Zhang, Luyao; Hao, Xiucheng; Ye, Le; Liao, Huailin; Huang, Ru |
| 2018 | A 43.2 mu W 2.4 GHz 64-QAM Pseudo-Backscatter Modulator Based on Integrated Directional Coupler | Hao, Xiucheng; Zhang, Hao; Shen, Zhengkun; Liu, Zexue; Zhang, Luyao; Jiang, Haoyun; Liu, Junhua; Liao, Huailin |
| 2018 | A 43.2 μw 2.4 GHz 64-QAM Pseudo-Backscatter Modulator Based on Integrated Directional Coupler | Hao, Xiucheng; Zhang, Hao; Shen, Zhengkun; Liu, Zexue; Zhang, Luyao; Jiang, Haoyun; Liu, Junhua; Liao, Huailin |
| 2020 | An 81-99 GHz Tripler with Fundamental Cancellation and 3rd Harmonic Enhancement Technique in 40-nm CMOS | Su, Xiaolei; Hao, Xiucheng; Wang, Dong; Shen, Zhengkun; Liu, Zexue; Liu, Junhua; Liao, Huailin |
| 2017 | An 89 mu W MICS/ISM Band Receiver for Ultra-Low-Power Applications | Liu, Zexue; Yang, Fan; Jiang, Haoyun; Hao, Xiucheng; Liu, Junhua; Liao, Huailin |
| 2017 | An 89 ��w MICS/ISM band receiver for ultra-low-power applications | Liu, Zexue; Yang, Fan; Jiang, Haoyun; Hao, Xiucheng; Liu, Junhua; Liao, Huailin |
| 2016 | A 93.7% Peak Efficiency DC-DC Buck Converter with All-Pass Network Based Passive Level Shifter in 55 nm CMOS | Hao, Xiucheng; Yang, Fan; He, Mingxiao; Zheng, Yongan; Guo, Ying; Liao, Huailin |
| 2016 | A 93.7% peak efficiency DC-DC buck converter with all-pass network based passive level shifter in 55 nm CMOS | Hao, Xiucheng; Yang, Fan; He, Mingxiao; Zheng, Yongan; Guo, Ying; Liao, Huailin |
| 2019 | A Calibration-Free Fractional-N ADPLL Using Retiming Architecture and a 9-bit 0.3ps-INL Phase Interpolator | Jiang, Haoyun; Zhang, Zherui; Shen, Zhengkun; Hao, Xiucheng; Liu, Zexue; Li, Heyi; Tan, Yi; Zhou, Qiang; Liu, Junhua; Liao, Huailin |
| 2016 | CMOS integrated low TX noise digital transmitter with tunable directional coupler for high performance UHF RFID reader | Guo, Ying; Zheng, Yongan; Xia, Tao; Hao, Xiucheng; Ye, Le; Zhang, Xing; Liao, Huailin |
| 2018 | A Low Power SAW-less 2.4-GHz Receiver with an LC Matched Series N-path Filter | Liu, Zexue; Li, Heyi; Jiang, Haoyun; Hao, Xiucheng; Tan, Yi; Liu, Junhua; Liao, Huailin |
| 2018 | On-chip Self-Interference Canceller with Variable Inductor Based Electrical Balance Network for Full Duplex Systems | Hao, Xiucheng; Zheng, Yongan; Shen, Zhengkun; Liu, Zexue; Liu, Junhua; Liao, Huailin |
| 2018 | Quadrature amplitude modulated backscatter for 2.4GHz self-powered chips | Zhang, Luyao; Zhang, Hao; Shen, Zhengkun; He, Mingxiao; Hao, Xiucheng; Gong, Enbin; Ye, Le; Liao, Huailin |
| 2019 | A Reverse-RSSI Logarithmic Power Detector With+35-dBm Maximum Detectable Power in 180-nm CMOS | Hao, Xiucheng; Zheng, Yongan; Tian, Fan; Zhou, Qiang; Li, Heyi; Liu, Zexue; Liu, Junhua; Liao, Huailin |
