Browsing by Author Huang,Ru

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Issue DateTitleAuthor(s)
2022A 1.041-Mb/mm<sup>2</sup>27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded ApplicationsYan,Bonan; Hsu,Jeng-Long; Yu,Pang-Cheng; Lee,Chia-Chi; Zhang,Yaojun; Yue,Wenshuo; Mei,Guoqiang; Yang,Yuchao; Yang,Yue; Li,Hai; Chen,Yiran; Huang,Ru
202323.1 A 7.9fJ/Conversion-Step and 37.12aF<sub>rms</sub>Pipelined-SAR Capacitance-to-Digital Converter with kT/C Noise Cancellation and Incomplete-Settling-Based Correlated Level ShiftingGao,Jihang; Shen,Linxiao; Li,Heyi; Ye,Siyuan; Li,Jie; Xu,Xinhang; Cui,Jiajia; Gao,Yunhung; Huang,Ru; Ye,Le
2021A 28-nm 0.34-pJ/SOP spike-based neuromorphic processor for efficient artificial neural network implementationsKuang,Yisong; Cui,Xiaoxin; Zhong,Yi; Liu,Kefei; Zou,Chenglong; Dai,Zhenhui; Yu,Dunshan; Wang,Yuan; Huang,Ru
20233.8 A 0.954nW 32kHz Crystal Oscillator in 22nm CMOS with Gm-C-Based Current Injection ControlZhang,Yihan; You,You; Ren,Wenjie; Xu,Xinhang; Shen,Linxiao; Ru,Jiayoon; Huang,Ru; Ye,Le
Feb-2020A 57nW Software-Defined Always-On Wake-Up Chip for IoT Devices with Asynchronous Pipelined Event-Driven Architecture and Time-Shielding Level-Crossing ADCWang,Zhixuan; Ye,Le; Zhanq,Hao; Ru,Jiayoon; Fan,Haitao; Wang,Yangyuan; Huang,Ru
20237.8 A 22nm Delta-Sigma Computing-In-Memory (&Delta;&sum;CIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI ProcessingChen,Peiyu; Wu,Meng; Zhao,Wentao; Cui,Jiajia; Wang,Zhixuan; Zhang,Yadong; Wang,Qijun; Ru,Jiayoon; Shen,Linxiao; Jia,Tianyu; Ma,Yufei; Ye,Le; Huang,Ru
2022A 77&mu;W 115dB-Dynamic-Range 586fA-Sensitivity Current-Domain Continuous-Time Zoom ADC with Pulse-Width-Modulated Resistor DAC and Background Offset Compensation SchemeZhang,Hao; Shen,Linxiao; Zhang,Shichuang; Li,Heyi; Zhang,Yihan; Tan,Zhichao; Huang,Ru; Ye,Le
2023An 82-nW 0.53-pJ/SOP Clock-Free Spiking Neural Network With 40-&lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$\mu$&lt;/tex-math&gt; &lt;/inline-formula&gt;s Latency for AIoT Wake-Up Functions Using a Multilevel-Event-Driven Bionic Architecture anLiu,Ying; Ma,Yufei; He,Wei; Wang,Zhixuan; Shen,Linxiao; Ru,Jiayoon; Huang,Ru; Ye,Le
2022An 82nW 0.53pJ/SOP Clock-Free Spiking Neural Network with 40s Latency for AloT Wake-Up Functions Using Ultimate-Event-Driven Bionic Architecture and Computing-in-Memory TechniqueLiu,Ying; Wang,Zhixuan; He,Wei; Shen,Linxiao; Zhang,Yihan; Chen,Peiyu; Wu,Meng; Zhang,Hao; Zhou,Peng; Liu,Jinguang; Sun,Guangyu; Ru,Jiayoon; Ye,Le; Huang,Ru
2023A A 22nm 0.43pJ/SOP Sparsity-Aware In-Memory Neuromorphic Computing System with Hybrid Spiking and Artificial Neural Network and Configurable TopologyLiu,Ying; Chenl,Zhiyuan; Wang,Zhixuan; Zhao,Wentao; He,Wei; Zhu,Jianfeng; Wang,Oijun; Zhang,Ning; Jia,Tianyu; Ma,Yufei; Ye,Le; Huang,Ru
2023Accurate yet Efficient Stochastic Computing Neural Acceleration with High Precision Residual FusionHu,Yixuan; Zhang,Tengyu; Wei,Renjie; Li,Meng; Wang,Runsheng; Wang,Yuan; Huang,Ru
2023Advanced Compact Modeling for Transistor Aging: Trap-based Approaches and Mixed-mode CouplingWang,Runsheng; Sun,Zixuan; Li,Yu; Xue,Yongkang; Wang,Zirui; Ren,Pengpeng; Ji,Zhigang; Zhang,Lining; Huang,Ru
10-Jul-2022ASTERS: Adaptable Threshold Spike-timing Neuromorphic Design with Twin-Column ReRAM SynapsesLi,Ziru; Zheng,Qilin; Yan,Bonan; Huang,Ru; Li,Bing; Chen,Yiran
2022An Automatic Integration Network Approach for Generic Device Charge ModelingDai,Wu; Zhang,Fangxing; Wang,Kaifeng; Li,Yu; Tang,Yukun; Huang,Qianqian; Zhang,Lining; Huang,Ru
2022An Automatic Parameter Extraction Method Based on Autoencoder for PIN Diode ModelLi,Yu; Dai,Wu; Geng,Kexing; Zhang,Lining; Wang,Runsheng; Huang,Ru
10-Jul-2022AVATAR: An Aging- and Variation-Aware Dynamic Timing Analyzer for Application-based DVAFSZhang,Zuodong; Guo,Zizheng; Lin,Yibo; Wang,Runsheng; Huang,Ru
2023AVATAR: An Aging-and Variation-Aware Dynamic Timing Analyzer for Error-Efficient ComputingZhang,Zuodong; Guo,Zizheng; Lin,Yibo; Li,Meng; Wang,Runsheng; Huang,Ru
1-Jun-2023Back-End-of-Line Compatible HfO<sub>2</sub>/ZrO<sub>2</sub>Superlattice Ferroelectric Capacitor With High Endurance and Remnant PolarizationCui,Boyao; Wang,Xuepei; Li,Yuchun; Wu,Maokun; Wu,Yishan; Liu,Jinhao; Li,Xiaoxi; Ren,Pengpeng; Ye,Sheng; Ji,Zhigang; Lu,Hongliang; Wang,Runsheng; Zhang,DavidWei; Huang,Ru
2023Bi<sub>2</sub>O<sub>2</sub>Se-Perovskite Heterostructure Based Bipolar Photosensors as Reconfigurable Logic-In-Sensor DevicesXu,Lei; Liu,Shuo; Huang,Ru; He,Ming
2023A Calibration-Free 15-level/Cell eDRAM Computing-in-Memory Macro with 3T1C Current-Programmed Dynamic-Cascoded MLC achieving 233-to-304-TOPS/W 4b MACSong,Jiahao; Tang,Xiyuan; Luo,Haoyang; Zhang,Haoyi; Qiao,Xin; Sun,Zixuan; Yang,Xiangxing; Wang,Yuan; Wang,Runsheng; Huang,Ru