TitleStacked-cascode Class-E power amplifier with delay-controlled auxiliary branches in 65nm CMOS
AuthorsYang, Fan
Liao, Yu
Xia, Tao
Wang, Runhua
Huang, Ru
Liao, Huailin
AffiliationLaboratory of Microelectronic Devices and Circuits, Institute of Microelectronics, Peking University, Beijing, China
Issue Date2014
Citation2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014.Guilin, China.
AbstractLow breakdown voltage in deep-submicron CMOS devices has limited the supply voltage and output power of power amplifiers (PAs). In this paper, a differential cascode Class-E PA in 65nm CMOS is proposed. Using only the standard devices, the stacked-cascode structure can endure a maximum voltage up to 10V so that a supply voltage of 3.3V is possible for Class-E PA. An auxiliary branch is added to reduce the turn-on resistance. With an inductor to delay the control signal phase of the branch, the proposed PA has a power dissipation trade-off between the devices' on/off state. At 1.6GHz, the proposed Class-E PA achieves Power Added Efficiency (PAE) of 57.5% when it transmits 31.3dBm power. ? 2014 IEEE.
URIhttp://hdl.handle.net/20.500.11897/294797
ISSN9781479932962
DOI10.1109/ICSICT.2014.7021516
IndexedEI
Appears in Collections:信息科学技术学院

Files in This Work
There are no files associated with this item.

Web of Science®



Checked on Last Week

Scopus®



Checked on Current Time

百度学术™



Checked on Current Time

Google Scholar™





License: See PKU IR operational policies.