| Title | An Algorithm of Training Sample Selection for Integrated Circuit Device Modeling Based on Artificial Neural Networks |
| Authors | Zhang, Zhiyuan Cui, Xiaole Lin, Xinnan Zhang, Lining |
| Affiliation | Peking Univ, Shenzhen Grad Sch, ECE, Key Lab Integrated Microsyst, Shenzhen 518055, Peoples R China. Hong Kong Univ Sci & Technol, Dept ECE, Kowloon, Hong Kong, Peoples R China. |
| Keywords | device modeling artificial neural networks training sample size training accuracy CMOS TECHNOLOGY |
| Issue Date | 2016 |
| Publisher | IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) |
| Citation | IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).2016,314-317. |
| Abstract | In this paper, we propose a training sample selection algorithm for artificial neural networks device modeling to reduce training consuming time and data test cost. The proposed algorithm can be used to get the appropriate size of the training samples under the required training accuracy. Comparison between neural networks model and test data agrees well in a given training accuracy and proves correctness of the algorithm. |
| URI | http://hdl.handle.net/20.500.11897/459779 |
| Indexed | CPCI-S(ISTP) |
| Appears in Collections: | 深圳研究生院待认领 |
