TitleA 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/mu s Slope
AuthorsShen, Zhengkun
Jiang, Haoyun
Yang, Fan
Wang, Yixiao
Zhang, Zherui
Liu, Junhua
Liao, Huailin
AffiliationPeking Univ, Beijing, Peoples R China
Univ British Columbia, Vancouver, BC, Canada
Issue Date2021
Publisher2021 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)
URIhttp://hdl.handle.net/20.500.11897/617870
ISBN978-1-7281-9549-0
ISSN0193-6530
DOI10.1109/ISSCC42613.2021.9365949
IndexedEI
CPCI-S(ISTP)
Appears in Collections:待认领

Files in This Work
There are no files associated with this item.

Web of Science®



Checked on Last Week

Scopus®



Checked on Current Time

百度学术™



Checked on Current Time

Google Scholar™





License: See PKU IR operational policies.